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f1126d6d80
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2026-04-07 18:17:41 +01:00
4255eff56c
Merge pull request #45 from JJassonn69/feat/usb2.0-support
2026-04-07 18:10:22 +01:00
274abd7dd6
fix: add explicit reset for status_words to suppress Synth 8-7137 warning
2026-04-07 19:35:43 +03:00
408f4d126f
feat(usb): add FT2232H USB 2.0 interface for 50T production board
2026-04-07 19:22:16 +03:00
3e737fb90e
Merge remote-tracking branch 'origin/main' into develop
2026-04-07 17:42:03 +03:00
0db0e7bbfe
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2026-04-07 14:44:01 +01:00
849b32240b
fix(xdc): add hold false_path for ADC IDDR + reorganize build scripts by target
2026-04-07 15:13:13 +03:00
8d7b6e04a0
fix(rtl): force FIR adder tree to fabric to free 30 DSPs for FFT butterfly on 50T
2026-04-07 14:45:47 +03:00
d1927f150a
fix(rtl): add DONT_TOUCH attribute to prevent opt_design from gutting 50T wrapper
2026-04-07 06:46:30 +03:00
a0469cf1a0
feat(rtl): add radar_system_top_50t wrapper to solve IO pin overflow
2026-04-07 06:37:04 +03:00
802dca2a73
fix(scripts): disconnect nets before removing unconstrained ports
2026-04-07 06:23:31 +03:00
23eb88c6c7
fix(scripts): switch 50T build to non-project-mode impl + remove unconstrained ports
2026-04-07 06:17:03 +03:00
44460e7443
fix(constraints): change adc_pwdn from LVCMOS33 to LVCMOS25 for Bank 14 compatibility
2026-04-07 06:07:47 +03:00
96856c42e0
fix(scripts): inject DRC waivers via TCL.PRE hook for impl_1 child process
2026-04-07 05:59:51 +03:00
7d90e5e7d6
fix(constraints,scripts): resolve 50T build failures — LVDS_25 + DRC waivers + unconstrained ports
2026-04-07 05:48:35 +03:00
30f56f3089
fix(constraints): use LVDS (not LVDS_33) for 50T Bank 14 ADC inputs
2026-04-07 05:31:48 +03:00
d50e51ada6
fix(rtl,constraints): change IBUFDS to IOSTANDARD DEFAULT for multi-target bank voltage compatibility
2026-04-07 05:17:11 +03:00
1f315a62c8
fix(scripts,constraints): handle empty STATS properties in build summaries, fix 50T XDC DRC errors
2026-04-07 05:07:14 +03:00
6657e117d6
fix(scripts): fix TCL command substitution and impl status race in all 5 build scripts
2026-04-07 04:07:07 +03:00
1e284767cd
fix(test,docs): remove dead xfft_32 files, update test infra for dual-16 FFT, add regression guide
2026-04-07 02:51:48 +03:00
04982a3176
Merge pull request #41 from joyshmitz/fix/tcl-portability
2026-04-06 21:21:37 +01:00
9b383fcb70
Merge pull request #42 from joyshmitz/fix/dual-subframe-consistency
2026-04-06 21:21:11 +01:00
ffc89f0bbd
fix(rtl,gui,cosim,formal): adapt surrounding files for dual 16-pt FFT (follow-up to PR #33 )
2026-04-06 23:15:50 +03:00
48b3847256
fix(scripts): make Vivado TCL scripts portable and update RTL file lists
2026-04-06 22:53:42 +03:00
22758fa370
Merge pull request #40 from joyshmitz/docs/readme-contributing
2026-04-06 18:09:39 +01:00
7eb81668e0
docs: fix FPGA part number, dead paths, and add CONTRIBUTING.md
2026-04-06 20:06:56 +03:00
73d6d9b80a
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2026-04-05 11:44:10 +01:00
0f5a04f8a7
Delete 4_Schematics and Boards Layout/4_7_Production Files directory
2026-04-05 11:39:13 +01:00
8e0a90fcf5
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2026-04-05 05:05:10 +01:00
10e0914d60
Delete docs/assets/img/Nawfal.png
2026-04-04 21:04:42 +01:00
168b9b2ae0
Revise index.html for AERIS-10 documentation site
2026-04-02 01:42:50 +01:00
a343c856e3
Update image links to use raw GitHub URLs
2026-04-02 01:35:17 +01:00
7ffd1f6b10
Revise README for clarity and image updates
2026-04-02 01:31:23 +01:00
f12405e90e
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2026-04-02 01:24:58 +01:00
72411006ab
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2026-04-02 01:23:36 +01:00
1beb7dc1ad
Revise index.html with new images and metadata
2026-04-02 01:14:06 +01:00
49e22b8bc9
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2026-04-02 01:12:19 +01:00
c7fa099293
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2026-04-02 01:04:55 +01:00
81bf4cabbb
Delete 8_Utils directory
2026-04-02 01:03:40 +01:00
cfbe6d2bd4
Fix image paths in README.md
2026-04-02 00:58:22 +01:00
e4fa118b50
Refactor index.html for improved layout and SEO
2026-04-02 00:57:10 +01:00
c91e4b4252
Delete index.html
2026-04-02 00:56:29 +01:00
b7f40445a4
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2026-04-02 00:40:14 +01:00
2ec636ef58
Update index.html for absolute paths and styles
2026-04-02 00:32:41 +01:00
a6205bd768
Add initial HTML structure for AERIS-10 project
2026-04-02 00:01:44 +01:00
bbd0556200
Delete index.html
2026-04-01 23:53:26 +01:00
86681127b0
Add index.html for AERIS-10 documentation
2026-04-01 22:38:42 +01:00
d8d1d34a35
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2026-03-31 03:21:54 +01:00
484bf0907c
Delete 4_Schematics and Boards Layout/4_6_Schematics/PowerBoard/PowerBoard.brd
2026-03-31 03:21:09 +01:00
f5d89fd710
Fix badge syntax in README.md
2026-03-29 10:50:46 +01:00
a3d0d3fb0c
Fix image formatting in README.md
2026-03-29 08:47:06 +01:00
46c37e17d4
Merge pull request #33 from JJassonn69/fix/staggered-prf-dual16-doppler
2026-03-27 22:09:08 +01:00
a577b7628b
Fix staggered-PRF Doppler processing with dual 16-point FFTs
2026-03-27 23:05:28 +02:00
2a89713c21
Add sponsors section to README
2026-03-27 03:40:34 +01:00
f5765f6c2c
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2026-03-27 03:36:05 +01:00
02eb0b99cf
Delete 14_RADAR_Old_version directory
2026-03-22 01:32:49 +00:00
93c75d19df
Merge pull request #30 from JJassonn69/main
2026-03-21 20:02:05 +00:00
5499827ab7
add TE0713+UMFT601X-B FT601 integration dev bitstream (timing clean)
2026-03-21 20:43:52 +02:00
9dee28ab52
add TE0713 heartbeat bring-up artifact
2026-03-21 20:16:45 +02:00
f9ad30e737
GUI: add self-test UI, fix opcode mismatches (0x16->0x06, 0x04->0x05), update status parsing to 6-word/26-byte format
2026-03-20 20:54:42 +02:00
4985eccbae
Wire self-test results (0x31) to USB status readback path, add fpga_self_test to regression
2026-03-20 20:03:11 +02:00
eb907de3d1
Fix 5 GUI bugs: threaded connect, button toggle, live CFAR/MTI/DC replay, stable heatmap, physical axis labels
2026-03-20 19:36:21 +02:00
f8d80cc96e
Add radar dashboard GUI with replay mode for real ADI CN0566 data visualization, FPGA self-test module, and co-sim npy arrays
2026-03-20 19:02:06 +02:00
7a44f19432
Full-chain MTI+CFAR real-data co-simulation: bit-exact match across all 10247 checkpoints (decim->MTI->Doppler->DC notch->CFAR) using ADI CN0566 data
2026-03-20 17:16:12 +02:00
d5d28e9f1c
Build 25 engineering report: MTI canceller + DC notch timing PASS
2026-03-20 16:59:30 +02:00
ed629e7559
Integrate MTI canceller and DC notch filter for ground clutter removal
2026-03-20 16:39:17 +02:00
eb8e063f37
Change radar system image format to PNG
2026-03-20 05:49:13 +00:00
4801cb81d2
Replace radar system image with updated version
2026-03-20 05:48:20 +00:00
075ae1e77a
Add Build 24 15-point engineering report: timing, utilization, DSP/BRAM breakdown, power, DRC, methodology, congestion, routing, logic levels, build comparison, CFAR cost, verification summary
2026-03-20 05:47:20 +02:00
0b170f7c61
Added Full Diagram
2026-03-20 00:22:45 +00:00
d7fc8c6771
Complete Diagram
2026-03-20 00:17:42 +00:00
0745cc4f48
Pipeline CFAR noise computation: break critical path for timing closure
2026-03-20 05:24:08 +02:00
f71923b67d
Integrate CA-CFAR detector: replace fixed-threshold comparator with adaptive sliding-window CFAR engine (22/22 regression PASS)
2026-03-20 04:57:34 +02:00
e93bc33c6c
Production fixes 1-7: detection bugs, cfar→threshold rename, digital gain control, Doppler mismatch protection, decimator watchdog, bypass_mode dead code removal, range-mode register (21/21 regression PASS)
2026-03-20 04:38:35 +02:00
0b0643619c
Real-data co-simulation: range FFT, Doppler, full-chain all 2048/2048 exact match
2026-03-20 03:19:22 +02:00
b01c507de8
Added Full Diagram
2026-03-20 00:22:45 +00:00
19284ac277
Build 21 docs + TCL fix: WNS +0.156ns, 139 DSP, tag v0.1.4-build21
2026-03-20 02:21:33 +02:00
836bf8fb9f
Complete Diagram
2026-03-20 00:17:42 +00:00
2efab23cd9
Fix Vivado DRC: consolidate data_pending flags into single always block, fix MMCM LOCKED false_path
2026-03-20 01:56:20 +02:00
05efe692ad
Add Build 21 TCL script for FFT opts + E2E RTL fixes Vivado build
2026-03-20 01:48:51 +02:00
a31b4ec484
Update docs for FFT optimizations + E2E test + RTL fixes (19/19 FPGA regression)
2026-03-20 01:46:24 +02:00
0773001708
E2E integration test + RTL fixes: mixer sequencing, USB data-pending flags, receiver toggle wiring (19/19 FPGA)
2026-03-20 01:45:00 +02:00
a3e1996833
FFT engine: merge SHIFT into WRITE (5→4 cycle butterfly, 20% throughput) + barrel-shift twiddle index
2026-03-20 00:20:59 +02:00
02b3b68e00
Update docs for Gap 2 GUI Settings completion (5 of 7 gaps closed)
2026-03-19 23:58:37 +02:00
7cdfa486e5
Gap 2 GUI Settings: runtime chirp timing, stream control gating, status readback (18/18 FPGA, 20/20 MCU)
2026-03-19 23:54:48 +02:00
d2f20f5c15
Update docs for Build 20 (v0.1.3-build20) stable release + Gaps 3-7 status
2026-03-19 23:22:38 +02:00
e5d1b3cfc3
Gap 4 USB Read Path: wire host-to-FPGA command path with toggle CDC, add read path tests
2026-03-19 23:16:26 +02:00
c6103b37de
Gap 7 MMCM jitter cleaner + CIC comb CREG pipeline + XDC clock-name fix
2026-03-19 22:59:46 +02:00
f3bbf77ca1
Gap 3 Safety Architecture: IWDG watchdog, Emergency_Stop PA rail cutoff, temp max, periodic IDQ re-read, emergency state ordering + 5 tests (20/20 pass)
2026-03-19 21:58:39 +02:00
c87dce0d41
Fix chirp memory loader BRAM async reset (Gap 5, REQP-1839/1840)
2026-03-19 21:34:02 +02:00
94ffdb8f77
Add Phase 0 Vivado-style lint to regression runner, update golden data
2026-03-19 21:19:07 +02:00
e8b7cb7584
Fix matched filter synth errors: overlap_copy_count part-select width, add FSM default
2026-03-19 20:53:29 +02:00
3b7afba9d9
Add Build 18 production script with report_exceptions fix for Vivado 2025.2
2026-03-19 20:40:32 +02:00
ed6f79c6d3
FIR DSP48 pipelining (BREG+MREG) + matched filter BRAM migration with overlap cache
2026-03-19 20:39:01 +02:00
4e3c20066b
Add Build 17 production build script with full 15-point analysis checklist
2026-03-19 17:07:02 +02:00
8ca6d992cb
Update ILA probe script references from Build 13 to Build 16
2026-03-19 17:01:12 +02:00
683e70e784
Update heartbeat dev target: LVCMOS33 for Bank 16 FT601 compat, add comments
2026-03-19 16:47:59 +02:00
e78e36a635
Add UART diagnostic capture tool for board-day bring-up
2026-03-19 16:32:54 +02:00
9b786eb33f
Add FMC-path FT601 XDC for TE0713+TE0701+UMFT601X-B pin mapping
2026-03-19 16:20:56 +02:00
f16d9524e5
Add board-day worksheet and cross-link bring-up docs
2026-03-19 15:25:23 +02:00
NawfalMotii79
Jason
Serhii